IJEEDC FPGA Based Digital IC Tester

Journal Paper

Paper Title :FPGA Based Digital IC Tester

Author :Sandhya Singh Tripaliya, P.P. Bansod

Article Citation :Sandhya Singh Tripaliya ,P.P. Bansod , (2015 ) " FPGA Based Digital IC Tester " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 87-90, Volume-3, Issue-5

Abstract : This paper describes the implementation of testing of CMOS digital integrated circuits for both functional and delay fault testing using reconfigurable field programmable gate array, XC3S500E. This FPGA is interfaced with LCD and hex keypad, has created a very comfortable environment for CMOS digital integrated circuits testing. Tester has generated and applied test vectors for functional and delay fault testing for particular CMOS ICs and check responses with according to particular Gate response. After that, it can declare that CMOS ICs have any functional and delay fault or not. This reconfigurable FPGA based digital IC tester has many advantages over conventional IC testing using automatic test equipments. Keywords— DUT, FPGA, ATEs.

Type : Research paper

Published : Volume-3, Issue-5


	\|		PDF	\|	Viewed - 167	\|	Published on 2015-05-12

Mar. 2025
Submitted Papers	:	80
Accepted Papers	:	10
Rejected Papers	:	70
Acc. Perc	:	12%
Issue Published	:	143
Paper Published	:	1781
No. of Authors	:	4956

Published : Volume-3, Issue-5

JOURNAL SUPPORTED BY